基于FPGA音頻信號處理系統(tǒng)的設(shè)計

電子機(jī)電論文編號:JD846  論文字?jǐn)?shù):8570,頁數(shù):15

基于FPGA音頻信號處理系統(tǒng)的設(shè)計

目錄
摘  要 I
Abstract I
1  前言 1
2 FPGA工作原理 1
2.1 FPGA的介紹 1
2.2 FPGA配置模式 2
2.3 FPGA主要生產(chǎn)廠商介紹 2
2.4 FPGA與CPLD的辨別和分類 5
2.5 FPGA的應(yīng)用 6
2.6 產(chǎn)品設(shè)計 6
2.7 系統(tǒng)級應(yīng)用 6
3基于信號處理系統(tǒng)的設(shè)計 7
3.1 AC-Link音頻編/解碼原理 7
3.2 FPGA音頻編/解碼系統(tǒng)結(jié)構(gòu) 9
3.3 AC-Link音頻編/解碼的VHDL設(shè)計 10
4 總結(jié) 11
參考文獻(xiàn) 12
謝    辭 13

摘  要：隨著數(shù)字技術(shù)的廣泛應(yīng)用，基于一般的DSP芯片設(shè)計方案不理想。首次DSP芯片現(xiàn)階段的開發(fā)成本依然很高，遠(yuǎn)遠(yuǎn)不及大量ASIC芯片成本低，這正是ASIC芯片的優(yōu)點之一。本文提出一種利用FPGA實現(xiàn)AC-Link數(shù)字音頻處理系統(tǒng)的設(shè)計方案。AC-Link音頻編解碼系統(tǒng)以VHDL模塊進(jìn)行設(shè)計，經(jīng)過波形仿真和結(jié)果驗證后，將程序下載到FPGA中實現(xiàn)。把此系統(tǒng)用于信號處理系統(tǒng)設(shè)計中，可以縮短設(shè)計周期，提高設(shè)計的可靠性和效率。而且用 FPGA 實現(xiàn) AC-Link 聲卡的 D/A 變換功能的設(shè)計需要的資源少。
關(guān)鍵詞：AC-Link；音頻編/解碼；FPGA；VHDL

Audio Signal Processing System Design Based on FPGA

Abstract: With the extensive application of digital technology, based on the general program DSP chip design is not ideal. DSP chips the first time at this stage of development costs remain high, which is far less than a large number of low-cost ASIC chips, which is one of the advantages of ASIC chips. In this paper, a FPGA realization of the use of AC-Link digital audio processing system design. AC-Link Audio Codec VHDL module system design, after the results of waveform simulation and verification, it will download to the FPGA to achieve. FPGA realization and use of AC-Link sound card D / A conversion functions of the design, fewer resources are needed. This system is used to signal processing system design, we can shorten the design cycle and improve design reliability and efficiency.
Keywords: AC-Ling; audio encoder / decoder; FPGA; VHDL