基于FPGA的高速數(shù)據(jù)采集器設(shè)計(jì)

電氣自動化論文編號:ZD971    論文字?jǐn)?shù):15377,頁數(shù):39
目錄
摘要 I
Abstract II
1前 言 - 1 -
1.1設(shè)計(jì)背景 - 1 -
1.2數(shù)據(jù)采集系統(tǒng)的歷史與發(fā)展 - 2 -
1.3 國內(nèi)外研究現(xiàn)狀 - 2 -
1.4 本設(shè)計(jì)的意義與任務(wù) - 2 -
2采集系統(tǒng)中的關(guān)鍵技術(shù) - 3 -
2.1采樣原理 - 3 -
2.2 FPGA 技術(shù) - 5 -
2.3 FIFO 存儲器 - 6 -
3數(shù)據(jù)采集系統(tǒng)系統(tǒng)設(shè)計(jì) - 9 -
3.1系統(tǒng)的總體設(shè)計(jì) - 9 -
3.1.1方案的選擇 - 9 -
3.1.2 系統(tǒng)結(jié)構(gòu)框圖 - 9 -
3.1.3 關(guān)鍵器件的選型 - 10 -
3.1.1.1 AD芯片的選擇 - 10 -
3.1.1.2 FPGA的選擇 - 11 -
3.1.4 開發(fā)工具 - 12 -
3.2 模擬信號的輸入 - 12 -
3.2.1 八路模擬開關(guān)的使用 - 12 -
3.2.2 量程控制模塊 - 13 -
3.3 采樣轉(zhuǎn)換模塊的實(shí)現(xiàn) - 15 -
3.3.1 電平移位電路 - 15 -
3.3.2 A/D轉(zhuǎn)換電路 - 16 -
3.3.3 配置基準(zhǔn)電壓 - 17 -
3.3.4 數(shù)值轉(zhuǎn)換計(jì)算 - 19 -
3.4 FPGA控制模塊的實(shí)現(xiàn) - 19 -
3.4.1 FPGA開發(fā)流程 - 19 -
3.4.2 時鐘管理 - 20 -
3.4.3 讀取A/D結(jié)果 - 22 -
3.4.4 FIFO的操作 - 22 -
3.4.5 傳輸模塊 - 25 -
4調(diào)試與問題 - 27 -
4.1 調(diào)試環(huán)境 - 27 -
4.2 調(diào)試問題與解決辦法 - 27 -
4.3 測試結(jié)果 - 30 -
5 總結(jié)與展望 - 31 -
5.1 總結(jié) - 31 -
5.2 展望 - 31 -
致謝 - 32 -
附錄 - 34 -
附錄一:原理圖 (模擬部分) - 34 -
附錄二:PCB (模擬部分) - 35 -

摘要
 隨著科學(xué)技術(shù)的發(fā)展，人們對客觀世界的探索不斷加深，對數(shù)據(jù)信號的采集要求不斷提高。現(xiàn)在，數(shù)據(jù)采集技術(shù)向更快的速度，更高的分辨率，更寬的輸入范圍發(fā)展。而且，數(shù)據(jù)采集系統(tǒng)是大部分信號處理系統(tǒng)的最前端，如何正確地、實(shí)時地和精確地采集進(jìn)需要的數(shù)據(jù)是首先要攻破的難題，如果在采集上出現(xiàn)了問題，那么后級的系統(tǒng)就很難做出正確的判斷以及反饋相應(yīng)控制信息，所以采集系統(tǒng)是整個信號處理系統(tǒng)中的重中之重。傳統(tǒng)的數(shù)據(jù)采集系統(tǒng)，在速度上，在容量上已經(jīng)難以跟上時代的要求。
 本設(shè)計(jì)重點(diǎn)設(shè)計(jì)了一個基于FPGA的高速數(shù)據(jù)采集系統(tǒng)解決方案。系統(tǒng)支持八路模擬信號輸入同時也提供多量程切換功能,可按需要選擇1倍,10倍,100倍增益,結(jié)合各種模擬輸入處理和高達(dá)1Mhz采樣頻率的A/D轉(zhuǎn)換器，達(dá)到高輸入范圍，高速的，高分辨率的采集目標(biāo)，F(xiàn)PGA作為整個系統(tǒng)的控制中心,負(fù)責(zé)給各個模塊發(fā)送控制信號,通過它，采集的通道切換，量程的改變等等均能夠用上位機(jī)輕松地控制。

關(guān)鍵字 :數(shù)據(jù)采集、FPGA、高速A/D轉(zhuǎn)換
Abstract
  With the development of science and technology, more and more in the nature is being discovered by the people thus the demand for a better way of data acquisition is increasing. And the technology of data acquisition is being development continually, it become faster, higher in resolution, and much wider in input range. In the same time data acquisition system is in the front of any other systems in the whole signal processing system .It’s the most difficult and chief problem that how to acquire the data in real time and accurately. And if there is a problem in acquiring the data, the system behind it will be difficult to process an accurate decision and a corresponding react. So it’s the most important part in the whole designed system. However, it’s difficult for the traditional data acquisition system to fulfill the task of the present.
  This article describes a solution to the high speed data acquisition system based on FPGA .There are 8 channels for the analog signal inputs in the system. And what’s more, the range of input is changeable. It combines some analog input handlings and a high speed A/D converter whose sampling frequency can be reach to 1 MHz to achieve a high speed, high resolution sampling with a very wide input range. The FPGA module is the control center of the whole system, with responsibility for sending the commands that control the other module in the system. According to it, the system can be controlled by the supervisory computer easily in changing the acquisition channels and the input range and so on.

Keywords: data acquisition, FPGA, high speed A/D conversion